UMD3N dual digital transistor (npn+ pnp) features z dta114e and dtc114e transisto rs are built-in a package. z transistor elements are independen t, eliminating interference. z mounting cost and area can be cut in half. external circuit marking:d3 absolute maximum ratings (ta=25 ) parameter symbol limits unit supply voltage v cc 50 v input voltage v in -10~40 v i o 50 output current i c(max) 100 ma power dissipation pd 150(total) mw junction temperature tj 150 storage temperature tstg -55~150 electrical characteristics (ta=25 ) parameter symbol min. typ max. unit conditions v i(off) 0.5 v cc =5v ,i o =10 0 a input voltage v i(on) 3 v v o =0.3v ,i o =10ma output voltage v o(on) 0.3 v i o /i i =10ma/0.5ma input current i i 0.88 ma v i =5v output current i o(off) 0.5 a v cc =50v, v i =0 dc current gain g i 30 v o =5v,i o =5ma input resistance r 1 7 10 13 k ? resistance ratio r 2 /r 1 0.8 1 1.2 transition frequency f t 250 mhz v ce =10v ,i e =-5ma,f=100mhz sot-363 1 www.htsemi.com semiconductor jinyu 1 date:2011/ 05
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